Abstract—In this paper, we propose a MOS-BJT-NDR circuit, which can show the negative-differential-resistance (NDR) characteristic in its current-voltage (I-V) curve. This NDR circuit is composed of standard Si-based metal-oxide-semiconductor field-effect transistor (MOS) and bipolar junction transistor (BJT). Therefore, we can implement the applications using the standard CMOS process. We demonstrate the design of some logic circuits using the series-connected CMOS-NDR circuit based on the monostable-bistable transition logic element (MOBILE) theory. This logic circuit is designed based on the standard 0.18 μm CMOS process.
Index Terms—CMOS process, logic circuit, monostable–bistable transition logic element (MOBILE), negative-differential-resistance.
K. J. Gan is with the Department of Electrical Engineering, National Chia-Yi University, No. 300 Syuefu Rd, Chiayi City 60004, Taiwan, ROC (e-mail: gankj@ms52.hinet.net).
Z. K. Kao, D. Y. Chan, and J. S. Huang are with the Institute of Computer Science and Information Engineering, National Chia-Yi University, No. 300 Syuefu Rd, Chiayi City 60004, Taiwan, ROC (e-mail: w770917@gmail.com, dychan@mail.ncyu.edu.tw, ybbearq@gmail.com ).
C. S. Tsai is with the Department of Electrical Engineering, Kun Shan University, 949 Da-Wan Rd, Yung-Kang City, Tainan Hsien 71003, Taiwan, ROC (e-mail: e5040@mail.ksu.edu.tw).
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Cite:Kwang-Jow Gan, Zhen-Kai Kao, Cher-Shiung Tsai, Din-Yuen Chan, and Jian-Syong Huang, "Logic Circuit Design Based on Series-Connected CMOS-NDR Circuit," International Journal of Computer Theory and Engineering vol. 5, no. 3, pp. 562-566, 2013.
