Abstract—Abstract—The Canny edge detector plays an important role in pre-processing images for many virtual reality systems. In this paper, a multiplier-less implementation of the Canny edge detector is proposed, which enables the system to be built at a lower cost. It is a heterogeneous system using both Field Programmable Gate Array (FPGA) and microcontroller. It is well known that the Canny edge detector involves a number of local operators such as image smoothing and gradient computation which are complex and time consuming. So, it is not efficient to be implemented on low end processors. In this work, the time consuming tasks in the local operators are offloaded to the FPGA so that real time processing can be achieved. Our experiments show that the proposed system can be implemented with less than 1000 lookup tables which are suitable for low end FPGA products while the precision of the edge detection result is comparable to that implemented by software running on a personal computer.
Index Terms—Index Terms—FPGA, canny edge detection, smart camera, feature extraction.
Hung Kwan Fung and Kin Hong Wong are with the Department of Computer Science and Engineering, The Chinese University of Hong Kong, HSH Engineering Building, CUHK, Shatin, Hong Kong (e-mail: edwardfung123@gmail.com, khwong@cse.cuhk.edu.hk).
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Cite:Hung Kwan Fung and Kin Hong Wong, "A Multiplier-Less Implementation of the Canny Edge Detector on FPGA and Microcontroller," International Journal of Computer Theory and Engineering vol. 9, no. 3, pp. 172-178, 2017.
